P89C51UBPN中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書

DESCRIPTION

The 89C51/89C52/89C54/89C58 contain a non-volatile FLASH program memory that is parallel programmable. For devices that are serial programmable (In System Programmable (ISP) with a boot loader), see the 89C51RC+/89C51RD+ datasheet. Both families are Single-Chip 8-bit Microcontrollers manufactured in advanced CMOS process and are derivatives of the 80C51

microcontroller family. All the devices have the same instruction set as the 80C51.

FEATURES

? 80C51 Central Processing Unit

? On-chip FLASH Program Memory

? Speed up to 33 MHz

? Full static operation

? RAM expandable externally to 64 k bytes

? 4 level priority interrupt

? 6 interrupt sources

? Four 8-bit I/O ports

? Full-duplex enhanced UART

– Framing error detection

– Automatic address recognition

? Power control modes

– Clock can be stopped and resumed

– Idle mode

– Power down mode

? Programmable clock out

? Second DPTR register

? Asynchronous port reset

? Low EMI (inhibit ALE)

? 3 16-bit timers

? Wake up from power down by an external interrupt