P89LPC932BDH中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書

General description

The P89LPC932 is a single-chip microcontroller, available in low cost packages, based on a high performance processor architecture that executes instructions in two to four clocks, six times the rate of standard 80C51 devices. Many system-level functions have been incorporated into the P89LPC932 in order to reduce component count, board space, and system cost.

Features

■ A high performance 80C51 CPU provides instruction cycle times of 167-333 ns for all instructions except multiply and divide when executing at 12 MHz. This is 6 times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power savings and reduced EMI.

■ 2.4 V to 3.6 V VDD operating range. I/O pins are 5 V tolerant (may be pulled up or driven to 5.5 V).

■ 8 kB Flash code memory with 1 kB erasable sectors, 64-byte erasable page size.

■ 256-byte RAM data memory. 512-byte auxiliary on-chip RAM.

■ 512-byte customer Data EEPROM on chip allows serialization of devices, storage of set-up parameters, etc.

■ Two 16-bit counter/timers. Each timer may be configured to toggle a port output upon timer overflow or to become a PWM output.

■ Real-Time clock that can also be used as a system timer.

■ Capture/Compare Unit (CCU) provides PWM, input capture, and output compare functions.

■ Two analog comparators with selectable inputs and reference source.

■ Enhanced UART with fractional baud rate generator, break detect, framing error detection, automatic address detection and versatile interrupt capabilities.

■ 400 kHz byte-wide I2C-bus communication port.

■ SPI communication port.

■ Eight keypad interrupt inputs, plus two additional external interrupt inputs.

■ Four interrupt priority levels.

■ Watchdog timer with separate on-chip oscillator, requiring no external components. The watchdog prescaler is selectable from 8 values.

■ Active-LOW reset. On-chip power-on reset allows operation without external reset components. A reset counter and reset glitch suppression circuitry prevent spurious and incomplete resets. A software reset function is also available.

■ Low voltage reset (Brownout detect) allows a graceful system shutdown when power fails. May optionally be configured as an interrupt.

■ Oscillator Fail Detect. The Watchdog timer has a separate fully on-chip oscillator allowing it to perform an oscillator fail detect function.

■ Configurable on-chip oscillator with frequency range and RC oscillator options (selected by user programmed Flash configuration bits). The RC oscillator option allows operation without external oscillator components. Oscillator options support frequencies from 20 kHz to the maximum operating frequency of 12 MHz. The RC oscillator option is selectable and fine tunable.

■ Programmable port output configuration options:

◆ quasi-bidirectional,

◆ open drain,

◆ push-pull,

◆ input-only.

■ Port ‘input pattern match’ detect. Port 0 may generate an interrupt when the value of the pins match or do not match a programmable pattern.

■ Second data pointer.

■ Schmitt trigger port inputs.

■ LED drive capability (20 mA) on all port pins. A maximum limit is specified for the entire chip.

■ Controlled slew rate port outputs to reduce EMI. Outputs have approximately 10 ns minimum ramp times.

■ 23 I/O pins minimum (28-pin package). Up to 26 I/O pins while using on-chip oscillator and reset options.

■ Only power and ground connections are required to operate the P89LPC932 when on-chip oscillator and reset options are selected.

■ Serial Flash programming allows simple in-circuit production coding. Flash security bits prevent reading of sensitive application programs.

■ In-Application Programming of the Flash code memory. This allows changing the code in a running application.

■ Idle and two different Power-down reduced power modes. Improved wake-up from Power-down mode (a low interrupt input starts execution). Typical Power-down current is 1 μA (total Power-down with voltage comparators disabled).

■ 28-pin PLCC, TSSOP, and HVQFN packages.

■ Emulation support.