PCA9512BDP中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

General description

The PCA9512A is a hot swappable I2C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corruption of the data and clock buses and includes two dedicated supply voltage pins to provide level shifting between 3.3 V and 5 V systems while maintaining the best noise margin for each voltage level. Either pin may be powered with supply voltages ranging from 2.7 V to 5.5 V with no constraints on which supply voltage is higher. Control circuitry prevents the backplane from being connected to the card until a stop bit or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9512A provides bidirectional buffering, keeping the backplane and card capacitances isolated.

Features

■ Bidirectional buffer for SDA and SCL lines increases fanout and prevents SDA and SCL corruption during live board insertion and removal from multi-point backplane systems

■ Compatible with I2C-bus Standard mode, I2C-bus Fast mode, and SMBus standards

■ Built-in ?V/?t rise time accelerators on all SDAn and SCLn pins (0.6 V threshold) with ability to disable ?V/?t rise time accelerator through the ACC pin for lightly loaded systems

■ 5 V to 3.3 V level translation with optimum noise margin

■ High-impedance SDAn and SCLn pins for VCC or VCC2 = 0 V

■ 1 V precharge on all SDAn and SCLn pins

■ Supports clock stretching and multiple master arbitration and synchronization

■ Operating power supply voltage range: 2.7 V to 5.5 V

■ I/Os are not 5.5 V tolerant

■ 0 Hz to 400 kHz clock frequency

■ ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101

■ Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

■ Packages offered: SO8, TSSOP8 (MSOP8)

Applications

■ cPCI, VME, AdvancedTCA cards and other multi-point backplane cards that are required to be inserted or removed from an operating system