PCF5077T中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

FEATURES

? CMOS low-voltage, low-power

? Can be used in burst mode with power-down

? 3-wire serial bus interface with the bus available in Power-down mode

? On-chip ramp generator for 256 different power levels with two dynamic ranges

? Two programmable regulator start conditions (VKICK and VHOME)

? Programmable analog output voltage limitation

? Ramping speed depending on the 13 MHz system frequency clock for Global System for Mobile communications (GSM) and Personal Communications Network (PCN)

? Low swing input buffer for the 13 MHz master clock

? Compatible to a large number of different RF power modules

? Programmable temperature matching

? Dual supply concept for analog and digital part

? No external filter for suppression of clock pulse feed through

? Direct power control with ramping function (control loop can be switched off)

? On-chip Power-on reset for all registers

? Serial bus is compatible to bus systems independent of additional clock pulse after rising edge of strobe signal

? Low operating current consumption

? TTL compatible interface

? Programmable gain factor for sensor signal at OP1

? Two different voltages for 1 LSB of the burst power Digital-to-Analog Converter (DAC) are programmable.