PI6C20800S

3.3V, 100MHz PCIe Gen II Differential HCSL Clock Buffer

Phase jitter filter for PCIe? application\nEight Pairs of Differential Clocks\nLow skew < 50ps (PI6C20800S), <60ps (PI6C20800SI)\nLow Cycle-to-cycle jitter < 50ps\nOutput Enable for all outputs\nutputs Tristate control via SMBus\nPower Management Control\nProgrammable PLL Bandwidth\nPLL or Fanout op;

PI6C20800S

PCI Express 1:8 HCSL Clock Buffer

PI6C20800S_10

PCI Express 1:8 HCSL Clock Buffer

PI6C20800SAE

PCI Express 1:8 HCSL Clock Buffer

PI6C20800SAE

PCI Express 1:8 HCSL Clock Buffer

PI6C20800SIAE

PCI Express 1:8 HCSL Clock Buffer

PI6C20800SIVE

PCI Express 1:8 HCSL Clock Buffer

PI6C20800SVE

PCI Express 1:8 HCSL Clock Buffer

PI6C20800SVE

PCI Express 1:8 HCSL Clock Buffer

PI6C20800SAEX

Package：48-TFSOP（0.240"，6.10mm 寬）；包裝：卷帶（TR）剪切帶（CT）Digi-Reel? 得捷定制卷帶 類別：集成電路（IC） 應(yīng)用特定時(shí)鐘/定時(shí) 描述：IC CLOCK BUFFER 1:8 48TSSOP