PLL103-53中文資料PLL數(shù)據(jù)手冊(cè)PDF規(guī)格書
PLL103-53規(guī)格書詳情
DESCRIPTIONS
The PLL103-53 is designed as a 3.3V/2.5V buffer to distribute high-speed clocks in PC applications. The device has 30 outputs. These outputs can be configured to support 4 unbuffered DDR (Double Data Rate) DIMMS or to support 3 unbuffered standard SDR (Single Data Rate) DIMMS and 2 DDR DIMMS. The PLL103-53 can be used in conjunction with the PLL202-14/-54 or similar clock synthesizer for the VIA Pro 266 chipset.
FEATURES
? Generates 30-output buffers from one input.
? Supports up to 4 DDR DIMMS or 3 SDR DIMMS and 2 DDR DIMMS.
? Supports 266MHz DDR SDRAM.
? One additional output for feedback.
? Less than 5ns delay.
? Skew between any outputs is less than 100 ps.
? 2.5V or 3.3V Supply range.
? Enhanced DDR and SDRAM Output Drive selected by I2C.
? Available in 56 pin SSOP.
產(chǎn)品屬性
- 型號(hào)：
PLL103-53
- 制造商：
PLL
- 制造商全稱：
PLL
- 功能描述：
DDR SDRAM Buffer with 5 DDR or 3 SDR/3 DDR DIMMS
| 供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
|---|---|---|---|---|---|---|---|
PHASELINK |
23+ |
NA/ |
3676 |
原廠直銷,現(xiàn)貨供應(yīng),賬期支持! |
詢價(jià) | ||
SEC |
2016+ |
SMD |
2220 |
只做原裝,假一罰十,公司可開17%增值稅發(fā)票! |
詢價(jià) | ||
Phaseli |
2020+ |
SOP8 |
8000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
原裝正品 |
24+ |
NA |
66300 |
一級(jí)代理/全新原裝現(xiàn)貨/長(zhǎng)期供應(yīng)! |
詢價(jià) | ||
Phaselink |
SOP8 |
699839 |
集團(tuán)化配單-有更多數(shù)量-免費(fèi)送樣-原包裝正品現(xiàn)貨-正規(guī) |
詢價(jià) | |||
SEC |
22+23+ |
0603 |
56930 |
絕對(duì)原裝正品現(xiàn)貨,全新深圳原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
PHASELINK |
589220 |
16余年資質(zhì) 絕對(duì)原盒原盤 更多數(shù)量 |
詢價(jià) | ||||
PHASELINK |
22+ |
SOP8 |
5000 |
全新原裝現(xiàn)貨!自家?guī)齑? |
詢價(jià) | ||
24+ |
3000 |
公司存貨 |
詢價(jià) | ||||
PHASELI |
2021+ |
SOP8 |
100500 |
一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨,長(zhǎng)期排單到貨 |
詢價(jià) |
