TC40H259P中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書

The TC40H259 is an 8-bit addressable lat ch

having one common input line and eight independent

output lines.

The respective bits are controlled by LATCH

SELECT inputs (A, B and C).

When CLEAR input is at H level and ENABLE (G)

input is at L level, the data is written into the

bit selected by LATCH SELECT inputs (A, B and C).

In this case, the other bits hold their previous

conditions.

When both of CLEAR input and ENABLE (G) input

go to H level, write of all bits is inhibited.

regardless of LATCH SELECT input, and their pre-

vious conditions are held.

When CLEAR input is set to L level and

ENABLE (G) input is set to H level, all bits are

reset to L level regardless of the other inputs.

The pin assignment and function of this latch

are the same as those of the LSTTL 74LS259.