TC74VHC174F_V01中文資料東芝數(shù)據(jù)手冊(cè)PDF規(guī)格書

The TC74VHC174 is an advanced high speed CMOS HEX D-TYPE FLIP

FLOP fabricated with silicon gate C2MOS technology.

It achieves the high speed operation similar to equivalent Bipolar Schottky

TTL while maintaining the CMOS low power dissipation.

Information signals applied to D inputs are transferred to the Q output on

the positive going edge of the clock pulse.

When the CLR input is held low, the Q output are in the low logic level

independent of the other inputs.

An input protection circuit ensures that 0 to 5.5 V can be applied to the

input pins without regard to the supply voltage. This device can be used to

interface 5 V to 3 V systems and two supply systems such as battery back

up. This circuit prevents device destruction due to mismatched supply and

input voltages.

Features

? High speed: fmax = 175 MHz (typ.) at VCC = 5 V

? Low power dissipation: ICC = 4 μA (max) at Ta = 25°C

? High noise immunity: VNIH = VNIL = 28 VCC (min)

? Power down protection is provided on all inputs.

? Balanced propagation delays: tpLH ～? tpHL

? Wide operating voltage range: VCC (opr) = 2 to 5.5 V

? Low noise: VOLP = 0.8 V (max)

? Pin and function compatible with 74ALS174