TFRA08C13-DB中文資料AGERE數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

Features

■ Eight independent T1/E1 transmit and receive framers.

■ Internal DS1 transmit clock synthesis—no external oscillator necessary.

■ Comprehensive alarm reporting and performance monitoring:

— Programmable automatic and on-demand alarm transmission.

■ Automatic facility data link:

— Automatic transmission of ESF performance report message.

■ Common 2.048 Mbits/s, 4.096 Mbits/s, or 8.192 Mbits/s TDM highway.

■ Dual- or single-rail line-side I/O.

■ Supports one second polling interval for performance monitoring.

■ IEEE* Std. 1149.1 JTAG boundary scan.

■ 3.3 V low-power CMOS with 5 V tolerant inputs.

■ Available in 352-pin PBGA.

Applications

■ DS3 and E3 port cards for narrowband DXCs.

■ Multiservice switches.

■ High density DS1 and E1 port cards.

■ Frame relay access devices.

■ Byte-synchronous SDH/SONET mapping.

■ SONET and SDH drop alignment.

■ IP and packet routers.