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TPCE636-DOC中文資料TEWS數(shù)據(jù)手冊(cè)PDF規(guī)格書

廠商型號(hào) |
TPCE636-DOC |
功能描述 | Reconfigurable FPGA with 16 x 16 bit Analog Input and 16 x 16 bit Analog Output |
文件大小 |
258.649 Kbytes |
頁面數(shù)量 |
3 頁 |
生產(chǎn)廠商 | TEWS Technologies GmbH |
企業(yè)簡稱 |
TEWS |
中文名稱 | TEWS Technologies GmbH官網(wǎng) |
原廠標(biāo)識(shí) | ![]() |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-5-1 23:00:00 |
人工找貨 | TPCE636-DOC價(jià)格和庫存,歡迎聯(lián)系客服免費(fèi)人工找貨 |
TPCE636-DOC規(guī)格書詳情
Application Information
The TPCE636 is a half-length X4 PCIe compatible
module providing a user configurable Kintex7 FPGA
with 16 ADC input channels and 16 DAC output
channels.
The TPCE636 ADC input channels are based on the
Linear Dual 16-Bit 5Msps Differential LTC2323-16
ADC. The TPCE636 provides 16 ADC channels.
Each of the 16 channels has a resolution of 16bit
and can work with up to 5Msps. The analog input
circuit is designed to allow input voltages up to ±10V
on each input-pin (results in ±20V differential voltage
range).
The TPCE636 DAC output channels are based on
the Dual 16bit AD5547 DAC. Each DAC output is
designed as a single-ended bipolar ±10V analog
output.
For customer specific I/O extension or inter-board
communication, the TPCE636 provides 64 FPGA
I/Os on a back I/O connector and 4 FPGA Multi-
Gigabit-Transceiver on a Samtec FireFly?
connector. Digital back I/O lines can be configured
as 64 single ended LVCMOS25 or as 32 differential
LVDS25 interface.
All front I/O lines such as the ADC interface and
DAC interface are connected to a 98-pin. Samtec
ERF8-049 Rugged EdgeRate Connector.
The User FPGA is connected to a 1GB, 32 bit wide
DDR3 SDRAM. The SDRAM-interface uses an
internal Memory Controller of the Kintex-7.
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詢價(jià) |