UPD4702C中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

? Incremental inputs (A, B)

? On-chip phase discrimination circuit (up-count mode

when the phase order is A → B, down-count mode

when B → A) 4-multiplication count method

? On-chip edge detection circuit

? 8-bit up/down counter latch output

? Carry output, borrow output

? Count data output controllable (3-state output)

? CMOS, single +5 V power supply