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PLL102-10SC中文資料PLL數(shù)據(jù)手冊PDF規(guī)格書
PLL102-10SC規(guī)格書詳情
DESCRIPTION
The PLL102-10 is a high performance, low skew, low jitter zero delay buffer designed to distribute high speed clocks and is available in 8-pin SOIC or MSOP package. It has two outputs that are synchronized with the input. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than ±350 ps, the device acts as a zero delay buffer.
FEATURES
? Frequency range 50 ~ 120MHz.
? Internal phase locked loop will allow spread spectrum modulation on reference clock to pass to outputs.
? Zero input - output delay.
? Less than 700 ps device - device skew.
? Less than 250 ps skew between outputs.
? Less than 100 ps cycle - cycle jitter.
? 2.5V or 3.3V power supply operation.
? Available in 8-Pin SOIC or MSOP package.
產(chǎn)品屬性
- 型號:
PLL102-10SC
- 制造商:
PLL
- 制造商全稱:
PLL
- 功能描述:
Low Skew Output Buffer
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
PHASELI |
2020+ |
SSOP48 |
8000 |
只做自己庫存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價 | ||
PHASELIN |
0350+ |
SSOP48 |
30 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
ZCOMM |
24+ |
SMD |
1680 |
ZCOMM專營品牌進(jìn)口原裝現(xiàn)貨假一賠十 |
詢價 | ||
23+ |
BGAQFP |
8659 |
原裝公司現(xiàn)貨!原裝正品價格優(yōu)勢. |
詢價 | |||
PHASELIN |
589220 |
16余年資質(zhì) 絕對原盒原盤 更多數(shù)量 |
詢價 | ||||
PHASELINK |
22+23+ |
SSOP |
36452 |
絕對原裝正品全新進(jìn)口深圳現(xiàn)貨 |
詢價 | ||
PLL |
23+ |
SSOP |
360000 |
原廠授權(quán)一級代理,專業(yè)海外優(yōu)勢訂貨,價格優(yōu)勢、品種 |
詢價 | ||
16+ |
FBGA |
4000 |
進(jìn)口原裝現(xiàn)貨/價格優(yōu)勢! |
詢價 | |||
24+ |
SSOP |
2700 |
全新原裝自家現(xiàn)貨優(yōu)勢! |
詢價 | |||
PHASELIN |
23+ |
NA/ |
30 |
優(yōu)勢代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價 |