TC74VHC175FN中文資料東芝數(shù)據(jù)手冊PDF規(guī)格書

The TC74VHC175 is an advanced high speed CMOS QUAD

D.TYPE FLIP FLOP fabricated with silicon gato C2MOS

technology.

It achieves the high speed operation similar to equivalent

Bipolar Schottky TTL while maintaining the CMOS low

power dissipation.

These four flip-flops are controlled by a clock input (CK) and

a clear input (CLR).

The information data applied to the D inputs (D1 thru D4)

are transferred to the outputs (Q1 thru Q4 and Q1 thru Q4)

on the positive - going edge of the clock pulse.

When the CLR input is held low, the Q outputs are at the

low logic level and the Q outputs are at the high logic level,

regardless of other input conditions.

An input protection circuit ensures that 0 to 7V can be

applied to the input pins without regard to the supply

voltage. This device can be used to interface 5V to 3V

systems and two supply systems such as battery back up.

This circuit prevents device destruction due to mismatched

supply and input voltages.

FEATURES:

? High Speed...

*MAX=210MHz(typ.)

at Voo = 5V

Icc=4/A(Max.) at Ta=25°C

Low Power Dissipation

High Noise Immunity

.VNIH=VNIL = 28 Vcc (Min.)

Power Down Protection is provided on all inputs.

Balanced Propagation Delays....tplH tpHL

? Wide Operating Voltage Range... Vcc (opr)=2V~5.5V

? Low Noise

VOLP=0.8V (Max.)

? Pin and Function Compatible with 74ALS175